Aspeed and Lattice Partner to Launch AST1840 Server Management Chip, Targeting AI Data Center Complexity and Security

Aspeed Technology and Lattice Semiconductor have partnered to create the AST1840, a new server management chip designed to handle the increasing complexity and security needs of modern AI data centers.

The rise of powerful, liquid-cooled AI systems like NVIDIA's GB200 has made traditional single-chip server management insufficient, while recent security vulnerabilities have highlighted the need for more robust solutions.

The AST1840 meets this demand by combining management functions with a programmable FPGA and a hardware-based Root of Trust (Caliptra), aligning with new industry standards for modular and secure server design.

Aspeed and Lattice have unveiled a new chip, the AST1840, to solve the growing pains of managing powerful AI servers.

This partnership is a direct response to a rapidly changing data center landscape. The core issue is that AI systems, like NVIDIA's massive GB200 racks, are becoming incredibly complex. These aren't just servers anymore; they're rack-scale supercomputers that consume over 120 kilowatts and require liquid cooling. The traditional 'brain' of a server, a single chip called a BMC (Baseboard Management Controller), is struggling to keep up with the explosion of sensors, power demands, and modular components in these new systems.

So, what's the solution? The industry needed a new approach, which led to the development of 'companion' chips that work alongside the main BMC. The AST1840 is exactly that—a Server Management Companion (SMC).

The rationale behind this new chip is driven by three key factors.

First, there's the sheer complexity. The AST1840 includes a programmable FPGA, which gives server designers the flexibility to manage all the unique, custom hardware in AI racks. This programmability is something a standard BMC lacks, allowing it to offload complex control tasks and adapt to rapidly evolving hardware designs.

Second, security has become a top priority. A critical vulnerability discovered in a widely used BMC in 2025 showed that this management chip could be a major weak point. To counter this, the industry is adopting a much stronger security model based on a hardware Root of Trust (RoT). The AST1840 integrates Caliptra, an open-standard RoT, to ensure the server boots securely and can't be easily compromised.

Third, the industry is standardizing this modular approach. The Open Compute Project (OCP), a consortium of tech giants, has been developing specifications like DC-MHS that formalize the use of these satellite controllers. The AST1840 is designed to comply with these standards, making it easier for manufacturers to adopt across different server models.

In essence, Aspeed and Lattice aren't just releasing a new product. They are providing a crucial building block that aligns perfectly with the direction the entire AI industry is heading: toward more powerful, modular, and secure data center infrastructure.

Glossary

BMC (Baseboard Management Controller): A specialized processor that monitors the physical state of a server, such as temperature, fan speeds, and power status, independent of the main CPU.
FPGA (Field-Programmable Gate Array): An integrated circuit that can be configured by a customer or a designer after manufacturing—hence "field-programmable." It provides high performance and flexibility for specialized tasks.
Root of Trust (RoT): A source that can always be trusted within a computing system. It's typically a secure hardware component that forms the foundation for all secure operations.

Aspeed and Lattice Partner to Launch AST1840 Server Management Chip, Targeting AI Data Center Complexity and Security

Aspeed and Lattice have unveiled a new chip, the AST1840, to solve the growing pains of managing powerful AI servers.

The rationale behind this new chip is driven by three key factors.

Glossary

BMC (Baseboard Management Controller): A specialized processor that monitors the physical state of a server, such as temperature, fan speeds, and power status, independent of the main CPU.
FPGA (Field-Programmable Gate Array): An integrated circuit that can be configured by a customer or a designer after manufacturing—hence "field-programmable." It provides high performance and flexibility for specialized tasks.
Root of Trust (RoT): A source that can always be trusted within a computing system. It's typically a secure hardware component that forms the foundation for all secure operations.