AWS Reportedly Splits Next-Gen Trainium Chip Packaging Between Intel and TSMC to Hedge Against Supply Bottlenecks

The soaring demand for AI chips has created a supply bottleneck for TSMC's dominant 'CoWoS' advanced packaging technology.

To manage this, Amazon Web Services (AWS) is likely to use a dual strategy for its 'Trainium' chip: TSMC for high-performance and Intel's 'EMIB' for cost-effective, high-volume models.

This move helps AWS secure its supply chain and signals a major shift in the semiconductor market, establishing Intel's packaging as a viable alternative to TSMC's.

INTCGOOGL

Amazon Web Services (AWS) appears to be preparing a major strategic shift for its next-generation AI accelerator, Trainium.

The core of this story lies in a significant bottleneck within the semiconductor supply chain. To build powerful AI chips, multiple smaller chiplets must be stitched together onto a single base. This advanced packaging process is incredibly complex, and the dominant technology, called CoWoS from Taiwan's TSMC, is in extremely high demand. With everyone from NVIDIA to Google wanting more, there simply isn't enough capacity to go around. This creates a major risk for cloud giants like AWS, whose AI ambitions depend on a steady supply of these chips.

To navigate this challenge, AWS is reportedly pursuing a clever dual-sourcing strategy. First, it would continue using TSMC's CoWoS for its flagship, highest-performance Trainium chips, ensuring it has the best technology for the most demanding tasks. Second, for more cost-sensitive or volume-focused versions, it would turn to Intel's competing technology, EMIB. This approach allows AWS to secure a larger supply, reduce its dependence on a single supplier, and potentially lower costs. This isn't a unique idea; Google is reportedly exploring a similar path for its TPU chips.

This scenario is supported by a growing trail of evidence. First, in April and May 2026, multiple tech publications reported that both AWS and Google were in active discussions with Intel about using its advanced packaging. This was bolstered by news that memory giant SK Hynix was also testing Intel's EMIB, a critical step for integrating high-bandwidth memory (HBM) into AI chips. Second, Intel's own executives have been dropping hints, mentioning that "billions per year" in packaging deals were close, and its stock price has surged on this speculation. Third, looking back further, industry reports since early 2025 have consistently highlighted the CoWoS shortage, making it clear that major customers would eventually need a 'Plan B.'

While AWS and Intel have not officially confirmed this plan, the converging signals make it a highly probable scenario. The industry will be watching key upcoming events, like Intel's Computex keynote and AWS's re:Invent conference, for an official announcement that could reshape the AI chip landscape.

Advanced Packaging: A method of integrating multiple small chips (chiplets) into a single, more powerful processor, as if they were one. It's essential for modern high-performance AI chips.
CoWoS (Chip-on-Wafer-on-Substrate): TSMC's industry-leading advanced packaging technology, known for its high performance but facing supply constraints due to high demand.
EMIB (Embedded Multi-die Interconnect Bridge): Intel's competing advanced packaging technology. It is emerging as a viable alternative to CoWoS, offering scalability and a way to diversify the supply chain.