Broadcom has set an ambitious goal to sell at least one million of its advanced 3D-stacked chips by 2027, signaling a major shift in AI hardware production.
This technology, which Broadcom calls its '3.5D' platform, is a game-changer. Think of it as building a skyscraper for chips instead of a single-story building. By vertically stacking silicon dies using a technique called hybrid bonding, it creates much faster and more power-efficient connections between them. This is precisely what today's massive AI models need to efficiently link compute logic with vast amounts of memory.
This announcement didn't happen in a vacuum; it's the result of several key developments. First, the technological foundation was laid in late 2024 when Broadcom first unveiled its platform. Second, the manufacturing capability is finally catching up. TSMC, the world's leading chipmaker, is aggressively expanding its advanced packaging (CoWoS) and 3D stacking (SoIC) capacity, which was previously a major industry bottleneck. Third, the demand is immense. Hyperscalers like Google and OpenAI are increasingly designing their own custom AI chips, or ASICs, with partners like Broadcom, and these designs require the leap in performance that only 3D stacking can provide.
So, what does selling one million of these high-tech chips mean for the bottom line? At a base-case average selling price (ASP) of $7,500 per chip, this could generate an additional $7.5 billion in revenue for Broadcom in 2027 alone. While this provides a significant boost to top-line growth, the company has noted that these complex, custom AI products carry slightly lower gross margins than its traditional business—a calculated trade-off for market leadership and scale.
Ultimately, Broadcom's target is more than just a sales forecast. It's a clear indicator that the AI industry is graduating from proofs-of-concept to the high-volume manufacturing of cutting-edge, 3D-integrated chips. This move solidifies Broadcom's critical role, alongside Nvidia, in building the next generation of AI infrastructure.
- 3D Stacking: A semiconductor manufacturing method that vertically stacks multiple silicon dies (chips) to create a single, more powerful and efficient integrated circuit.
- Advanced Packaging (CoWoS/SoIC): Technologies used to combine multiple chips into a single package. CoWoS (Chip-on-Wafer-on-Substrate) is a 2.5D technology, while SoIC (System-on-Integrated-Chips) is a true 3D stacking technology.
- ASIC (Application-Specific Integrated Circuit): A chip customized for a particular use, such as Google's TPU for AI, rather than for general-purpose use.