A new technology called 'embedded substrate' is rapidly emerging as a powerful solution to the bottlenecks in AI and high-performance computing (HPC) packaging.
This shift is driven by two major challenges. First, the power consumption of AI accelerators is soaring. For instance, NVIDIA's H100 GPU consumes up to 700W, and the newer B200 is reported to reach around 1,000W. This massive power demand requires an extremely stable and efficient Power Delivery Network (PDN). Second, the advanced packaging process itself, particularly TSMC's CoWoS, is facing a severe bottleneck, with lead times stretching from 52 to over 78 weeks. This supply shortage forces chipmakers to find alternative ways to enhance performance and stability at different stages of production.
Embedded substrates offer a compelling answer to these problems. The core idea is to embed passive components, such as Multi-Layer Ceramic Capacitors (MLCCs), directly inside the substrate package instead of mounting them on the surface. By placing these components much closer to the AI chip, it's possible to dramatically lower the PDN impedance, ensuring cleaner and more stable power delivery. This helps manage the high-frequency power fluctuations common in high-performance chips, improving overall signal integrity and performance.
As a result, the industry is moving quickly to adopt this technology. Major chip designers like NVIDIA, AMD, and Intel are reportedly increasing their inquiries for embedded substrate solutions, moving from simple proof-of-concept tests to serious requests for quotes (RFQs). In response, key suppliers are ramping up investments. Japan's Ibiden has announced a massive 500 billion yen investment in high-performance substrates, and Samsung Electro-Mechanics is expanding its FC-BGA facility in Vietnam. These large-scale capital expenditures signal a strong belief that embedded technology is the future of advanced packaging.
- PDN (Power Delivery Network): A circuit that supplies stable power from the source to the components of an electronic system, like a semiconductor chip.
- CoWoS (Chip-on-Wafer-on-Substrate): An advanced 2.5D packaging technology developed by TSMC, used to integrate multiple chips, like GPUs and HBM, into a single package.
- MLCC (Multi-Layer Ceramic Capacitor): A tiny electronic component that temporarily stores and releases electricity, crucial for stabilizing power supply to semiconductors.
