Discussions have begun to relax the standard thickness for next-generation High Bandwidth Memory (HBM).
The first reason for this change is purely practical: to make mass production feasible. Stacking 20 layers of memory chips is incredibly challenging. The next-generation technology, Hybrid Bonding, is promising but still faces hurdles in terms of cost and production yield. By allowing the HBM package to be slightly thicker, manufacturers can continue using the proven and mature Thermo-Compression (TC) Bonding technology. This pragmatic move helps them avoid massive capital investment and the risks of poor yields on a new process.
The second reason is a strategic, system-level adjustment. AI accelerators are no longer just separate components; the logic chip and HBM are packaged together as a single, integrated system. As logic chips themselves get thicker due to advanced 3D stacking technologies like TSMC's SoIC, a problem arises: if the HBM remains too thin, the components won't align properly on the final package. Adjusting the HBM's vertical height (Z-height) to match the logic die ensures this "coplanarity," which is critical for the entire system's performance and reliability.
So, why is this happening now? A confluence of factors is driving this decision. First, major customers like NVIDIA are demanding extremely high performance for the HBM in their next-gen "Rubin" GPUs, increasing packaging complexity. Second, the intense competition between SK hynix and Samsung to be first to market with HBM4 creates pressure to lock in achievable manufacturing standards quickly. Finally, the ongoing bottleneck in advanced packaging capacity makes it crucial to maximize output with existing, reliable technologies.
In essence, relaxing the HBM thickness standard isn't a step backward. It's a strategic pause—a bridge solution allowing the industry to meet explosive AI demand with today's technology while buying time to perfect the next leap forward into Hybrid Bonding.
- TC (Thermo-Compression) Bonding: A mature method for stacking chips that uses heat and pressure to form connections.
- Hybrid Bonding: An advanced technique that directly bonds copper pads between chips, allowing for much denser and faster connections.
- Z-height: The vertical height of a chip or package, a critical dimension in 3D advanced packaging.