Kioxia and SanDisk have unveiled a groundbreaking technology that could dramatically increase the storage capacity of memory chips.
At its core, the innovation is a new architecture called MSA-CBA (Multi-Stacked Cell Array – CMOS Bonded Architecture). Instead of attempting to build one impossibly tall tower of memory, this method involves creating multiple, shorter stacks on separate silicon wafers and then bonding them together with direct copper-to-copper connections. This is their strategic path to breaking the 1,000-layer barrier for 3D NAND flash memory, a long-sought goal in the industry.
The timing of this announcement is driven by a confluence of factors. First, engineers are hitting a physical wall. Stacking a single die beyond about 300 layers causes the wafer to warp, compromising its integrity. The multi-stack bonding approach elegantly sidesteps this issue. The validation of this technique at the prestigious VLSI Symposium confirms it as a credible engineering solution, not just a theoretical concept.
Second, the market is urgently demanding more capacity. The NAND memory market is currently a “seller’s market,” with prices for high-capacity enterprise SSDs skyrocketing. TrendForce projected a staggering 70-75% price jump in a single quarter. This intense demand creates a powerful financial incentive for manufacturers to find ways to cram more memory bits onto each wafer, and stacking more layers is the most effective way to achieve this.
Finally, the competitive landscape is heating up. Kioxia has been developing the foundational CBA technology for years. Meanwhile, its chief rival, Samsung, is also publicly targeting 1,000-layer NAND by 2030 using a similar wafer-bonding strategy. This makes Kioxia and SanDisk's demonstration a critical move to maintain a competitive edge in the high-stakes race for next-generation memory.
In essence, this breakthrough is a strategic necessity, born from physical limitations, urgent market demand, and intense competition. It paves the way for a new era of high-capacity storage that will power future technologies.
- Glossary
- 3D NAND: A type of flash memory that stacks memory cells vertically to increase storage density.
- QLC (Quad-Level Cell): A NAND technology that stores four bits of data per memory cell, increasing capacity at the cost of some endurance.
- Wafer Bonding: A semiconductor manufacturing process that joins two or more silicon wafers together to create a single, multi-layered device.