Nvidia has officially narrowed its list of potential partners for a new packaging technology called CoWoP (Chip-on-Wafer-on-PCB) to just three companies: Zhen Ding Technology, Unimicron, and Kinwong.
This decision is driven by a critical challenge facing the entire AI industry: a severe bottleneck in advanced packaging. For years, Nvidia has relied on TSMC's cutting-edge CoWoS (Chip-on-Wafer-on-Substrate) technology to build its powerful GPUs. However, demand has exploded so rapidly that even with TSMC doubling its capacity, it's simply not enough. TSMC's own chairman, C.C. Wei, admitted that capacity was about 'three times short' of what the AI market needed, a sentiment echoed by Nvidia's CEO Jensen Huang.
So, Nvidia is actively cultivating an alternative path. The CoWoP technology is a strategic hedge. Its key innovation is replacing the expensive and supply-constrained ABF substrate (a component of CoWoS) with a more readily available printed circuit board (PCB). By developing this technology with proven PCB makers, Nvidia hopes to create a parallel supply chain that can ease the pressure on TSMC and ensure it can meet future demand for its chips.
However, this is not a simple task. The technology is new and carries significant technical risks, such as potential warping and lower manufacturing yields. This is why Nvidia's long-term partnership with SPIL, a leader in chip assembly and testing (OSAT), is so crucial. SPIL provides the expertise and capacity needed to manage the complex qualification process, making the entire initiative more feasible and less of a purely speculative project.
Adding another layer of complexity is geopolitics. The inclusion of Kinwong, a Chinese company, on the shortlist comes with risks related to U.S. export controls. While it offers regional diversification, it also means Nvidia must navigate a tricky regulatory landscape. Ultimately, this move shows Nvidia is pursuing a multi-pronged strategy: innovating technically with CoWoP, securing its supply chain with key partners like SPIL, and carefully balancing global supplier options against political risks.
- CoWoP (Chip-on-Wafer-on-PCB): An advanced packaging method where chips are placed on a wafer, which is then mounted directly onto a printed circuit board (PCB), bypassing the traditional substrate.
- CoWoS (Chip-on-Wafer-on-Substrate): A similar packaging technology, but it uses a silicon interposer or substrate to connect the chips, which is a key bottleneck component.
- OSAT (Outsourced Semiconductor Assembly and Test): Companies that provide third-party chip assembly, packaging, and testing services.