Siemens and NVIDIA Unveil GPU-Accelerated Solution to Slash Chip Verification Time to Days

As advanced chips like those for AI become incredibly complex, the process of verifying their design has become a major bottleneck, slowing down development.

Siemens and NVIDIA have partnered to create a new solution that combines specialized hardware (FPGA) with GPU acceleration to drastically speed up this verification process.

This allows chipmakers to test trillions of operations in just a few days, reducing the risk of costly errors and accelerating the launch of next-generation semiconductors.

Siemens and NVIDIA have announced a groundbreaking solution to tackle one of the biggest challenges in modern semiconductor development.

As we enter the 2-nanometer (2nm) era, chips, especially the SoCs (System-on-a-Chip) powering AI, have become mind-bogglingly complex, containing trillions of transistors. Before a chip design is sent for manufacturing—a process called tape-out—it must be rigorously tested. This verification stage has become a severe bottleneck, with traditional CPU-based methods taking weeks or even months to complete.

This delay is not just a matter of time; it's a massive financial risk. First, the cost of manufacturing is skyrocketing. A single 3nm wafer costs around $20,000, and a 2nm wafer is projected to exceed $30,000. Second, if a flaw is discovered after manufacturing, a redesign, or respin, can cost tens of millions of dollars. This creates immense pressure to get the design perfect on the first try.

This is where the new collaboration comes in. Siemens is leveraging its Veloce proFPGA platform, a type of specialized hardware for prototyping chip designs, and combining it with NVIDIA's powerful GPU architecture. The result is a hardware-assisted verification system that can run trillions of test cycles in a matter of days. It's like switching from inspecting a blueprint with a magnifying glass to using a high-speed, AI-powered scanner.

This announcement is a significant milestone in a broader industry trend: the shift to GPU-accelerated EDA (Electronic Design Automation). At NVIDIA's recent GTC 2026 conference, the company formalized collaborations with all three major EDA players—Siemens, Synopsys, and Cadence. This signals that using GPUs for chip design is no longer a niche idea but is rapidly becoming the industry standard. The message is clear: to design the complex chips of tomorrow, the parallel processing power of GPUs is essential. This partnership turns that vision into a practical, powerful tool for engineers worldwide.

EDA (Electronic Design Automation): A category of software tools used for designing electronic systems such as integrated circuits and printed circuit boards.
Verification: The process of checking that a chip design meets its specifications and is free of bugs before it is manufactured.
Tape-out / Respin: Tape-out is the final step of sending a chip design to a foundry for manufacturing. A respin is the costly process of creating a new version of the chip to fix flaws found after the initial tape-out.

Siemens and NVIDIA Unveil GPU-Accelerated Solution to Slash Chip Verification Time to Days

As advanced chips like those for AI become incredibly complex, the process of verifying their design has become a major bottleneck, slowing down development.

Siemens and NVIDIA have partnered to create a new solution that combines specialized hardware (FPGA) with GPU acceleration to drastically speed up this verification process.

This allows chipmakers to test trillions of operations in just a few days, reducing the risk of costly errors and accelerating the launch of next-generation semiconductors.

Siemens and NVIDIA have announced a groundbreaking solution to tackle one of the biggest challenges in modern semiconductor development.

EDA (Electronic Design Automation): A category of software tools used for designing electronic systems such as integrated circuits and printed circuit boards.
Verification: The process of checking that a chip design meets its specifications and is free of bugs before it is manufactured.
Tape-out / Respin: Tape-out is the final step of sending a chip design to a foundry for manufacturing. A respin is the costly process of creating a new version of the chip to fix flaws found after the initial tape-out.