TSMC has officially designated Integrated Voltage Regulators, or iVR, as a core technology to solve the growing power crisis in AI and high-performance computing (HPC).
AI accelerators are becoming incredibly power-hungry. We're moving from chips that use hundreds of watts to future devices that could consume over a kilowatt. At the data center level, entire server racks are now planned for 70-130 kW, a huge jump from the traditional 10-15 kW. Delivering this much power from the motherboard to the chip is like trying to hydrate a marathon runner through a tiny straw—it's inefficient, leading to wasted energy and unstable voltage, a problem known as voltage droop.
The solution is to bring the power source closer to where it's used. That's exactly what iVR does. It moves the voltage regulation from the motherboard directly into the chip's advanced package, like CoWoS. Think of it as building a dedicated power substation right next to a factory. This dramatically shortens the electrical path, which, first, cuts down on power distribution losses, and second, allows the chip to respond instantly to sudden demands for power, keeping performance stable.
This iVR strategy is part of a bigger plan. It works hand-in-hand with another key TSMC innovation called Super Power Rail (SPR), a form of backside power delivery. Traditionally, power and data signals travel on the same side of a silicon wafer, creating traffic jams. SPR creates a separate, dedicated power highway on the back of the chip. Combining iVR with SPR is the ultimate goal, creating an incredibly efficient and robust power network for future chips.
While TSMC's A16 process with fully integrated SPR is set for 2027, the demand for power-efficient AI chips is exploding right now. iVR on existing advanced processes like N3 and N2P serves as a critical bridge. This strategic push benefits TSMC's ecosystem partners, too. Companies involved in specialized memory (AP Memory) and advanced testing (Forcera) are poised to gain, as integrating power solutions into the package makes the final chips more complex and difficult to test and validate.
In essence, TSMC's focus on iVR is more than just a technical tweak; it's a fundamental architectural shift to address the new primary bottleneck in computing: power. By solving this challenge, TSMC aims to sustain its leadership and enable the next generation of AI.
- Integrated Voltage Regulator (iVR): A component that manages and stabilizes the power supplied to a chip, integrated directly into the chip's package instead of sitting on the motherboard.
- Super Power Rail (SPR): A backside power delivery network that separates power lines from data lines on a chip, creating a more efficient and direct path for electricity.
- CoWoS (Chip-on-Wafer-on-Substrate): TSMC's advanced packaging technology that allows multiple chips (like processors and memory) to be stacked or placed side-by-side on an interposer, creating a single, powerful integrated system.