US-Japan-Taiwan Alliance Taps Powerchip for ZAM Memory Production, Challenging HBM Dominance

The AI memory market is facing a critical bottleneck due to high demand and limited supply of HBM, creating a need for alternative solutions.

A US-Japan-Taiwan alliance, featuring Intel, SoftBank, and Powerchip, is developing Z-Angle Memory (ZAM) as a next-generation standard with higher capacity and lower power consumption.

Taiwan's Powerchip being named a key manufacturing partner solidifies the project's path to commercialization, shifting it from a concept to a viable production plan.

A formidable alliance is emerging to reshape the AI memory landscape, with Taiwan's Powerchip stepping into a pivotal manufacturing role for a new technology called Z-Angle Memory (ZAM).

The driving force behind this is the relentless demand for AI, which has pushed High Bandwidth Memory (HBM) to its limits. The current market is defined by a severe supply shortage. Key suppliers like SK hynix and Micron have already sold out their HBM production for the next couple of years. Furthermore, the entire supply chain is choked by a critical bottleneck: TSMC's advanced CoWoS packaging, which is essential for assembling AI accelerators. This scarcity not only inflates costs but also highlights the pressing need for a more power-efficient alternative.

Enter ZAM, a strategic initiative led by Japan's SoftBank (via its subsidiary SAIMEMORY) and powered by technology from Intel. ZAM aims to be more than just an incremental improvement. It represents a fundamental architectural shift, using Z-axis stacking to create memory chips that promise 2-3 times the capacity of current HBM while consuming 40-50% less power. This ambitious goal directly targets the biggest pain points in data centers today: capacity and energy consumption.

This development didn't happen overnight; it's the result of a clear causal chain. First, the persistent HBM and CoWoS supply constraints throughout 2025 created the market urgency for a new path. Without an alternative, AI hardware growth would stall. Second, the official partnership announcement between SoftBank and Intel in February 2026 provided the formal framework, setting a clear timeline with a prototype expected by fiscal year 2027 and commercialization by 2029. Finally, the recent news naming Powerchip and Japan's Shinko Electric as manufacturing partners provides the missing piece of the puzzle. It adds execution credibility, transforming ZAM from a research project into a tangible production roadmap.

Ultimately, the ZAM alliance is more than a technical collaboration. It's a strategic geopolitical move to create a 'second track' for AI memory, diversifying the supply chain and challenging the current HBM-centric ecosystem. Its success could redefine the performance and efficiency standards for the next generation of AI infrastructure.

HBM (High Bandwidth Memory): A type of high-performance computer memory used in conjunction with high-performance GPUs and accelerators. It involves stacking memory chips vertically to achieve higher bandwidth and lower power consumption than traditional memory.
CoWoS (Chip-on-Wafer-on-Substrate): An advanced packaging technology developed by TSMC. It allows multiple chips to be integrated on a single interposer, enabling high-density connections and improved performance, crucial for modern AI chips.
ZAM (Z-Angle Memory): A next-generation memory technology being developed by a consortium including SoftBank and Intel. It uses a novel Z-axis stacking method to aim for significantly higher density and lower power usage compared to HBM.

US-Japan-Taiwan Alliance Taps Powerchip for ZAM Memory Production, Challenging HBM Dominance

The AI memory market is facing a critical bottleneck due to high demand and limited supply of HBM, creating a need for alternative solutions.

A US-Japan-Taiwan alliance, featuring Intel, SoftBank, and Powerchip, is developing Z-Angle Memory (ZAM) as a next-generation standard with higher capacity and lower power consumption.

Taiwan's Powerchip being named a key manufacturing partner solidifies the project's path to commercialization, shifting it from a concept to a viable production plan.

A formidable alliance is emerging to reshape the AI memory landscape, with Taiwan's Powerchip stepping into a pivotal manufacturing role for a new technology called Z-Angle Memory (ZAM).

HBM (High Bandwidth Memory): A type of high-performance computer memory used in conjunction with high-performance GPUs and accelerators. It involves stacking memory chips vertically to achieve higher bandwidth and lower power consumption than traditional memory.
CoWoS (Chip-on-Wafer-on-Substrate): An advanced packaging technology developed by TSMC. It allows multiple chips to be integrated on a single interposer, enabling high-density connections and improved performance, crucial for modern AI chips.
ZAM (Z-Angle Memory): A next-generation memory technology being developed by a consortium including SoftBank and Intel. It uses a novel Z-axis stacking method to aim for significantly higher density and lower power usage compared to HBM.